Topology-Cognizant Optimal Power Flow in Multi-Terminal DC Grids


Altun T. , Madani R., Davoudi A.

IEEE TRANSACTIONS ON POWER SYSTEMS, vol.36, no.5, pp.4588-4598, 2021 (Journal Indexed in SCI) identifier identifier

  • Publication Type: Article / Article
  • Volume: 36 Issue: 5
  • Publication Date: 2021
  • Doi Number: 10.1109/tpwrs.2021.3067025
  • Title of Journal : IEEE TRANSACTIONS ON POWER SYSTEMS
  • Page Numbers: pp.4588-4598
  • Keywords: Power transmission lines, Voltage control, Transmission line matrix methods, Switches, Optimization, Programming, Topology, HVDC transmission, multi-terminal dc grids, optimal power flow, optimal transmission switching, VSC-HVDC, CONVEX RELAXATION, AC/DC GRIDS, DROOP, APPROXIMATION, FORMULATION, SECURITY, STRATEGY, SYSTEMS, MTDC

Abstract

In this paper, we propose a topology-cognizant optimal power flow (OPF) paradigm with additional safety constraints for multi-terminal direct current (MTDC) grids. The resulting formulation is concerned with the optimization of controller set-points, i.e., voltage and power levels at each bus, and the switching status of transmission lines that collectively referred to as grid topology. A pair of additional safety constraints are integrated into the problem formulation to prevent voltage violations caused by power fluctuations in between two controller set-point updates. Searching for a grid topology that offers more efficient operation leads to a mixed-integer nonlinear program (MINLP) which is computationally challenging due to: i) Non-convex power flow equations, (ii) Non-convex converter loss equations, and iii) Binary variables accounting for the operational status of transmission lines. Non-convexities of power flows and converter loss equations are tackled by means of a mixed-integer second-order cone programming (MISOCP) relaxation, while the optimal switching status of transmission lines are determined via a branch-and-bound search. Numerical results for the modified IEEE 14, 30, and 57-bus systems are used to verify the merits of the proposed method. Furthermore, this method is experimentally validated using the CIGRE B4 DC grid benchmark in a real-time hardware-in-the-loop platform.